For reference , Fex is a translation framework for x86 to ARM much like Apple’s Rosetta2 and Microsoft’s Prism.
Valve sponsor development as it’s also the way the new Steam Frame supports x86 games. It’s also being used (as a fork) in Crossover Beta to replace the use of Rosetta2.
I mean don't modern CPUs basically just run an x86_64 emulator on a RISC machine anyway? Like there's a layer between the microcode and the actual x86 instructions already.
No, that's a myth. It's true that the instruction decoder in a CPU core translates from ISA opcodes to micro-ops for the backend, but those micro-ops are in many cases functionally very close to the ISA instruction and decidedly not RISC-like. For example, the ADD r/m64, imm32 instruction (read from memory, add constant, write to memory) is translated to a single micro-op on several Zen architectures [1], which is far from anything you could call "RISC".
dagmx · · focus · HN ↗
Valve sponsor development as it’s also the way the new Steam Frame supports x86 games. It’s also being used (as a fork) in Crossover Beta to replace the use of Rosetta2.
MiroslavPokorny · · focus · HN ↗
THen they wouldnt require any emulator for any new compiles.
raverbashing · · focus · HN ↗
x86 bytecode is bytecode
ErroneousBosh · · focus · HN ↗
adwn · · focus · HN ↗
[1] <a href="https://uops.info/html-instr/ADD_M64_I32.html" rel="nofollow">https://uops.info/html-instr/ADD_M64_I32.html