Thread

1. aurareturn · 1789540438 · focus · HN ↗

   Chip density increase is slowing down. Since N10, density scaling has been 60-80%. N3 to N2 is only 20%. And now N2 to A14 is also only 20%.

   1. osnium123 · 1789562063 · focus · HN ↗

      Is the increase in wafer cost higher than the density increase? If so, that means that the cost per transistor is also going up.

      1. HarHarVeryFunny · 1789759200 · focus · HN ↗

         The cost-per-transistor used to fall as density increased (Moore's Law), but has now basically flattened off.

         As each generation of lithography tech (DUV -> EUV -> High-NA EUV) gets pushed to the limit, it becomes necessary to use multiple etching steps per layer (higher cost, less wafers-per-minute) where previously one had been enough, then the next generation (e.g. EUV vs DUV) resets that to one step, then that becomes two ...

         The trouble is that each new generation of tech costs considerably more than the one it replaces, both in terms of machine cost and operational cost, so the overall trend seems to have become fairly flat.

         1. MichaelZuo · 1789761505 · focus · HN ↗

            I think the cost per transistor has gone slightly upwards, it bottomed out a few years ago.

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