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Samsung is expected to more than double output of its HBM4 and HBM4E DRAM

562 points · 458 comments · giuliomagnifico

fooker · 1789929721 · focus · HN ↗
What's the main blocker (other than the current inflated cost) for using HBM instead of DRAM as the primary memory for consumer electronics?
1. bob1029 · 1789930366 · focus · HN ↗
  It's not that there's a blocker. It's that it takes roughly 3x the manufacturing capacity to produce an HBM package at the same storage capacity as DRAM. We are sacrificing total bytes for bandwidth.
  1. tliltocatl · 1789931127 · focus · HN ↗
    How so? FEOL is pretty much the same, BEOL is almost the same save TSVs, the packaging tech is different and more advanced, but not exactly 1:1 comparable. Do TSVs really occupy 3x the area of DDR IO's?
    Const-me · 1789931864 · focus · HN ↗
    See remark on the slide 11: <a href="https://www.servethehome.com/micron-evolving-memory-architectures-for-ai-at-hot-chips-2026/" rel="nofollow">https://www.servethehome.com/micron-evolving-memory-architec... That presentation is by Micron.
    skavi · 1789932231 · focus · HN ↗
    direct link: <a href="https://www.servethehome.com/micron-evolving-memory-architectures-for-ai-slide-11/" rel="nofollow">https://www.servethehome.com/micron-evolving-memory-architec...
    tliltocatl · 1789932475 · focus · HN ↗
    Yuck. Time to build an xSPI/HyperRAM workstation (if only these had multi-bank chips).
    buildbot · 1789935945 · focus · HN ↗
    Sadly the $ per byte of xSPI and HyperRAM quite high
    tliltocatl · 1789936340 · focus · HN ↗
    Yes, but enough to run a text editor, or even a mechanical CAD. Not an LLM, but that's the point!

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