How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip
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Unofficial Hacker News client; not affiliated with Y Combinator.
How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip
Unofficial Hacker News client; not affiliated with Y Combinator.
pama · · focus · HN ↗
> When the first chips came back from the foundry in May, the team pointed its internal AI models at designing software to run benchmarks such as SemiAnalysis’s InferenceX. On DeepSeek’s multi-head latent attention kernel benchmark, performance climbed from 0.31 percent of the theoretical ceiling (set by the chip’s compute and memory bandwidth) to 88.94 percent in roughly 40 hours. Ho says this result is repeatable, so the time between when foundries deliver the first chips and when production ramps up can be reduced. “All our schedule assumptions are going to be based on the fact we have this capability now,” he says.
wmf · · focus · HN ↗
brookst · · focus · HN ↗
Eridrus · · focus · HN ↗
It doesn't help that FPGAs are not made at the same scale as CPUs so don't benefit from the economies of scale.
I'm super curious if you have thoughts on specific pieces of software that would be economically better because I've thought about this in my niche and sort of come to the conclusion that it won't help.
I do think things like SIMD in CPUs will get more use and maybe we will get more difficult to program for CPU features, but I haven't found a use case where off the shelf FPGA components would help with typical software.
brookst · · focus · HN ↗
Eridrus · · focus · HN ↗