Thread

1. pama · 1789777255 · focus · HN ↗

   Having worked with people doing bringup of specialized chips, I am awed at how the world has changed.

   > When the first chips came back from the foundry in May, the team pointed its internal AI models at designing software to run benchmarks such as SemiAnalysis’s InferenceX. On DeepSeek’s multi-head latent attention kernel benchmark, performance climbed from 0.31 percent of the theoretical ceiling (set by the chip’s compute and memory bandwidth) to 88.94 percent in roughly 40 hours. Ho says this result is repeatable, so the time between when foundries deliver the first chips and when production ramps up can be reduced. “All our schedule assumptions are going to be based on the fact we have this capability now,” he says.

   1. wmf · 1789782465 · focus · HN ↗

      Back in the day you'd write the code before the chip came back but I guess today it's faster to wait.

      1. brookst · 1789826154 · focus · HN ↗

         Makes me wonder about AI and FPGAs. If the cost and effort to (re)program them goes to zero, maybe interesting new applications?

         1. nz · 1789855407 · focus · HN ↗

            Many languages can compile a subset of their code to FPGA HDLs. Back in the 80s Harel's group had statecharts that were compilable to C, C++, and FPGA HDLs. Not sure that LLMs brings anything substantially new to this.

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